The present invention is related to frequency multipliers and, more particularly, to a circuit for producing a pair of output pulses for each cycle of an applied input pulse.
There is a myriad of uses for pulse doubling circuits. For instance, pulse doubling circuits find applications as tachometeters, DC to DC step up converters and in logic system applications to name but a few. A pulse doubling circuit may also find use in a digital transceiver system wherein digital coded input data is received and decoded. One such transceiver system uses a current to voltage comparator circuit in conjunction with a pulse generator, RLC tank circuit and a pulse doubler circuit for producing an output clock pulse train for interpreting the coded input data. To maintain the clock train in synchronization with the input data, to ensure that the input data is properly decoded, it is necessary that the widths of the pulses of the clock train not vary.
Hence, a need exists for a pulse doubler circuit suited to be manufactured in monolithic integrated form in which the pulses produced therefrom are substantially independent to power supply, temperature and process variations.